Alif Semiconductor /AE302F80F5582AE_CM55_HE_View /GPU2D /GPU2D_CACHECTL

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Interpret as GPU2D_CACHECTL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Val_0x0)D2C_CACHECTL_ENABLE_FB 0 (Val_0x0)D2C_CACHECTL_FLUSH_FB 0 (Val_0x0)D2C_CACHECTL_ENABLE_TX 0 (Val_0x0)D2C_CACHECTL_FLUSH_TX

D2C_CACHECTL_FLUSH_TX=Val_0x0, D2C_CACHECTL_FLUSH_FB=Val_0x0, D2C_CACHECTL_ENABLE_TX=Val_0x0, D2C_CACHECTL_ENABLE_FB=Val_0x0

Description

Cache Control Register

Fields

D2C_CACHECTL_ENABLE_FB

0 (Val_0x0): Disable the framebuffer cache

1 (Val_0x1): Enable the framebuffer cache

D2C_CACHECTL_FLUSH_FB

0 (Val_0x0): Do not flush the framebuffer cache

1 (Val_0x1): Flush the framebuffer cache

D2C_CACHECTL_ENABLE_TX

0 (Val_0x0): Disable the texture cache

1 (Val_0x1): Enable the texture cache

D2C_CACHECTL_FLUSH_TX

0 (Val_0x0): Do not flush the texture cache

1 (Val_0x1): Flush the texture cache

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